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ADAU1361BCPZ-R7 数据表(PDF) 68 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  78 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 68 Page - Analog Devices

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Data Sheet
ADAU1361
CONTROL REGISTERS
analog.com
Rev. E | 68 of 78
Table 69. Jack Detect Pin Control Register (Continued)
Bits
Bit Name
Description
[3:2]
JDP[1:0]
JACKDET/MICIN pad pull-up/pull-down configuration.
Setting
Configuration
00
Pull-up
01
Reserved
10
None (default)
11
Pull-down
R67: Dejitter Control, 16,438 (0x4036)
The dejitter control register allows the size of the dejitter window to be set, and also allows all dejitter circuits in the device to be activated
or bypassed. Dejitter circuits protect against duplicate samples or skipped samples due to jitter from the serial ports in subordinate mode.
Disabling and reenabling certain subsystems in the device—that is, the ADCs, serial ports, and DACs—during operation can cause the
associated dejitter circuits to fail. As a result, audio data fails to be output to the next subsystem in the device.
When the serial ports are in main mode, the dejitter circuit can be bypassed by setting the dejitter window to 0. When the serial ports are in
subordinate mode, the dejitter circuit can be reinitialized prior to outputting audio from the device, guaranteeing that audio is output to the next
subsystem in the device. Any time that audio must pass through the ADCs, serial port, or DACs, the dejitter circuit can be bypassed and reset
by setting the dejitter window size to 0. In this way, the dejitter circuit can be immediately reactivated, without a wait period, by setting the
dejitter window size to the default value of 3.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DEJIT[7:0]
Table 70. Dejitter Control Register
Bits
Bit Name
Description
[7:0]
DEJIT[7:0]
Dejitter window size.
Window Size
Core Clock Cycles
00000000
0
00000011
3 (default)
00000101
5
Table 71. R8 and R9 Volume Settings
Binary Value
Volume Setting (dB)
000000
−12
000001
−11.25
000010
−10.5
000011
−9.75
000100
−9
000101
−8.25
000110
−7.5
000111
−6.75
001000
−6
001001
−5.25
001010
−4.5
001011
−3.75
001100
−3
001101
−2.25



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