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ADAU1361BCPZ-R7 数据表(PDF) 2 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  78 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 2 Page - Analog Devices

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Data Sheet
ADAU1361
TABLE OF CONTENTS
analog.com
Rev. E | 2 of 78
Features................................................................ 1
Applications........................................................... 1
General Description...............................................1
Functional Block Diagram......................................1
Specifications........................................................ 3
Analog Performance Specifications................... 3
Power Supply Specifications.............................. 6
Typical Current Consumption............................. 7
Typical Power Management Measurements...... 7
Digital Filters.......................................................8
Digital Input/Output Specifications..................... 9
Digital Timing Specifications.............................. 9
Digital Timing Diagrams................................... 10
Absolute Maximum Ratings.................................12
Thermal Resistance......................................... 12
ESD Caution.....................................................12
Pin Configuration and Function Descriptions...... 13
Typical Performance Characteristics................... 15
System Block Diagrams...................................... 18
Theory of Operation.............................................21
Startup, Initialization, and Power......................... 22
Power-Up Sequence........................................ 22
Power Reduction Modes.................................. 22
Digital Power Supply........................................ 22
Input/Output Power Supply.............................. 22
Clock Generation and Management.................22
Clocking and Sampling Rates............................. 24
Core Clock........................................................24
Sampling Rates................................................24
PLL...................................................................24
Record Signal Path..............................................27
Input Signal Paths............................................ 27
Analog-to-Digital Converters............................ 29
Automatic Level Control (ALC)............................ 30
ALC Parameters...............................................30
Noise Gate Function.........................................31
Playback Signal Path...........................................33
Output Signal Paths......................................... 33
Headphone Output...........................................33
Pop-and-Click Suppression..............................35
Line Outputs.....................................................35
Control Ports........................................................36
Burst Mode Writing and Reading..................... 36
I2C Port.............................................................36
SPI Port............................................................39
Serial Data Input/Output Ports.............................40
Applications Information...................................... 42
Power Supply Bypass Capacitors.................... 42
GSM Noise Filter.............................................. 42
Grounding.........................................................42
Exposed Pad PCB Design............................... 42
Control Registers.................................................43
Control Register Details................................... 44
Outline Dimensions............................................. 78
Ordering Guide.................................................78
Evaluation Boards............................................ 78
REVISION HISTORY
8/2024—Rev. D to Rev. E
Changed Master to Main and Slave to Subordinate (Throughout).................................................................. 1
Changes to Ordering Guide........................................................................................................................... 78
Changes to Evaluation Boards...................................................................................................................... 78



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