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ADAU1361BCPZ-R7 数据表(PDF) 52 Page - Analog Devices |
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ADAU1361BCPZ-R7 数据表(HTML) 52 Page - Analog Devices |
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52 / 78 page ![]() Data Sheet ADAU1361 CONTROL REGISTERS analog.com Rev. E | 52 of 78 Table 39. ALC Control 1 Register (Continued) Bits Bit Name Description 1011 5.4682 sec 1100 10.936 sec 1101 21.873 sec 1110 43.745 sec 1111 87.491 sec [3:0] ALCTARG[3:0] ALC target. The ALC target sets the desired ADC input level. The PGA gain is adjusted by the ALC to reach this target level. The recommended target level is between −16 dB and −10 dB to accommodate transients without clipping the ADC. Setting ALC Target 0000 −28.5 dB (default) 0001 −27 dB 0010 −25.5 dB 0011 −24 dB 0100 −22.5 dB 0101 −21 dB 0110 −19.5 dB 0111 −18 dB 1000 −16.5 dB 1001 −15 dB 1010 −13.5 dB 1011 −12 dB 1100 −10.5 dB 1101 −9 dB 1110 −7.5 dB 1111 −6 dB R13: ALC Control 2, 16,403 (0x4013) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ALCATCK[3:0] ALCDEC[3:0] Table 40. ALC Control 2 Register Bits Bit Name Description [7:4] ALCATCK[3:0] ALC attack time. The attack time sets how fast the ALC starts attenuating after an increase in input level above the target. A typical setting for music recording is 384 ms, and a typical setting for voice recording is 24 ms. Setting Attack Time 0000 6 ms (default) 0001 12 ms 0010 24 ms 0011 48 ms 0100 96 ms 0101 192 ms 0110 384 ms 0111 768 ms 1000 1.54 sec 1001 3.07 sec 1010 6.14 sec 1011 12.29 sec 1100 24.58 sec |
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