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ADAU1361BCPZ-R7 数据表(PDF) 64 Page - Analog Devices

部件名 ADAU1361BCPZ-R7
功能描述  Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  78 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 64 Page - Analog Devices

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Data Sheet
ADAU1361
CONTROL REGISTERS
analog.com
Rev. E | 64 of 78
Table 61. Playback Pop/Click Suppression Register (Continued)
Bits
Bit Name
Description
10
85 ms
11
Off
R35: Playback Power Management, 16,425 (0x4029)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
HPBIAS[1:0]
DACBIAS[1:0]
PBIAS[1:0]
PREN
PLEN
Table 62. Playback Power Management Register
Bits
Bit Name
Description
[7:6]
HPBIAS[1:0]
Headphone bias control.
Setting
Headphone Bias Control
00
Normal operation (default)
01
Extreme power saving
10
Enhanced performance
11
Power saving
[5:4]
DACBIAS[1:0]
DAC bias control.
Setting
DAC Bias Control
00
Normal operation (default)
01
Extreme power saving
10
Enhanced performance
11
Power saving
[3:2]
PBIAS[1:0]
Playback path channel bias control.
Setting
Playback Path Bias Control
00
Normal operation (default)
01
Reserved
10
Enhanced performance
11
Power saving
1
PREN
Playback right channel enable.
0 = disabled (default).
1 = enabled.
0
PLEN
Playback left channel enable.
0 = disabled (default).
1 = enabled.
R36: DAC Control 0, 16,426 (0x402A)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DACMONO[1:0]
DACPOL
Reserved
DEMPH
DACEN[1:0]
Table 63. DAC Control 0 Register
Bits
Bit Name
Description
[7:6]
DACMONO[1:0]
DAC mono mode. The DAC channels can be set to mono mode within the DAC and output on the left channel, the right channel, or both
channels.
Setting
Mono Mode
00
Stereo (default)
01
Left channel in mono mode
10
Right channel in mono mode



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