TMP92FD54AI datasheet(35/84 Pages) TOSHIBA

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2006-01-27

92FD54AI-35

TMP92FD54AI

Table 4.3.6 Boot program transfer format (for reading product information) (2/2)

Number of

bytes

transferred

Data transferred from the

controller to the device

Baud rate

Data transferred from the device to

the controller

BOOT ROM 61st byte

∼

64th byte

⎯

Size (in half words) of flash memory blocks of

the same size (4 bytes)

00H, 80H, 00H and 00H beginning at the 61st

byte

65th byte

⎯

Number of flash memory blocks of the same

size (1 byte) 06H

66th byte

∼

69th byte

⎯

Start address of flash memory block of the

same size (4 bytes)

00H, 00H, 07H and 00H beginning at the 66th

byte

70th byte

∼

73rd byte

⎯

Size (in half words) of flash memory block of

the same size (4 bytes)

00H, 70H, 00H and 00H beginning at the 70th

byte

74th byte

⎯

Number of flash memory blocks of the same

size (1 byte) 02H

75th byte

∼

78th byte

⎯

Start address of flash memory block of the

same size (4 bytes)

00H, C0H, 08H and 00H beginning at the 75th

byte

79th byte

∼

82nd byte

⎯

Size (in half words) of flash memory block of

the same size (4 bytes)

00H, 10H, 00H and 00H beginning at the 79th

byte

83rd byte

⎯

Number of flash memory blocks of the same

size (1 byte) 02H

84th byte

⎯

CHECKSUM value for bytes 5 to 83

85th byte

(Wait for the next operation command

data)

⎯

*1: After returning abnormal response, the device waits for the operation command (third byte).

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