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TMP92FD54AI 数据表(PDF) 6 Page - Toshiba Semiconductor

部件名 TMP92FD54AI
功能描述  CMOS 32-bit Micro-controller
PDF  84 Pages
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TMP92FD54AI 数据表(HTML) 6 Page - Toshiba Semiconductor

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2006-01-27
92FD54AI-6
TMP92FD54AI
2.2
Pin names and functions
The following table shows the names and functions of the input/output pins.
Pin name
Pin
number
Number of
pins
In/Out
Function
(CMOS)
P00..P07
D0..D7
20th…27th 8
(TTL)
in/out
in/out
Port 0: I/O port. Input or output specifiable in units of bits.
Data: Data bus 0 to 7.
P40..P47
A0..A7
28th…35th
8
in/out
out
Port4: I/O port. Input or output specifiable in units of bits.
Address: Address bus 0 to 7.
P70
RD
81st
1
in/out
out
Port70: I/O port.
Read: Outputs strobe signal to read external memory.
P71
WR
82nd
1
in/out
out
Port 71: I/O port.
Write: Output strobe signal to write external memory.
P72
SI2
SCL2
83rd
1
in/out
Port 72: I/O port.
SBI channel 2: Input data at SIO mode
SBI channel 2: Clock input/output at I²C mode
P73
CS
84th
1
in/out
out
Port 73: I/O port.
Chip select: Outputs “low” if address is within specified address area.
P74
85th
1
in/out Port 74: I/O port.
P75
WAIT
87th
1
in/out
in
Port 75: I/O port.
Wait: Signal used to request CPU bus wait.
PC0
TI0
INT1
58th
1
in/out
in
in
Port C0: I/O port.
Timer input 0: Input pin for timer 0.
Interrupt request pin 1: Rising-edge interrupt request pin.
PC1
TO1
57th
1
in/out
out
Port C1: I/O port.
Timer output 1: Output pin for timer 1.
PC2
TO3
INT2
56th
1
in/out
out
in
Port C2: I/O port.
Timer output 3: Output pin for timer 3.
Interrupt request pin 2: Rising-edge interrupt request pin.
PC3
TI4
INT3
55th
1
in/out
in
in
Port C3: I/O port.
Timer input 4: Input pin for timer 4.
Interrupt request pin 3: Rising-edge interrupt request pin.
PC4
TO5
54th
1
in/out
out
Port C4: I/O port.
Timer output 5: Output pin for timer 5.
PC5
TO7
INT4
53rd
1
in/out
out
in
Port C5: I/O port.
Timer output 7: Output pin for timer 7.
Interrupt request pin 4: Rising-edge interrupt request pin.
PD0
TI8
INT5
A16
WUINT0
41st
1
in/out
in
in
out
in
Port D0: I/O port.
Timer input 8: Input pin for timer 8.
Interrupt request pin 5: Interrupt request pin with programmable rising/falling
edge.
Address: Address bus 16.
Wake up input 0: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD1
TI9
INT6
A17
WUINT1
42nd
1
in/out
in
in
out
in
Port D1: I/O port.
Timer input 9: Input pin for timer 9.
Interrupt request pin 6: Rising-edge interrupt request pin.
Address: Address bus 17.
Wake up input 1: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD2
TO8
A18
WUINT2
43rd
1
in/out
out
out
in
Port D2: I/O port.
Timer output 8: Output pin for timer 8
Address: Address bus 18.
Wake up input 2: Wake up request pin with programmable rising, falling or both
falling and rising edge.
PD3
TO9
A19
WUINT3
44th
1
in/out
out
out
in
Port D3: I/O port.
Timer output 9: Output pin for timer 9
Address: Address bus 19.
Wake up input 3: Wake up request pin with programmable rising, falling or both
falling and rising edge.
INT5
WUINT0
INT4
INT3
INT2
INT1
INT6
WUINT1
WUINT2
WUINT3



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