TMP92FD54AI datasheet(60/84 Pages) TOSHIBA

60 / 84 page

92FD54AI-60

2006-01-27

TMP92FD54AI

10) Flash Status Register

This is an 8-bit register which serves purposes of a flash memory status

monitor.

Flash status register

Bit symbol

R/BSY

Read/Write

R/W

After reset

FLSR

(16EH)

Function

Set to 0.

Set to 0

Ready

/Busy flag

0:Busy

(auto

operation in

progress)

1:Ready

(auto

operation

finished)

Figure 4.4.3(1) Flash Status Register

Bit 2: Ready/Busy Flag bit

The device has a RDY/BSY output which enables the status of automatic operation

to be recognized by the host in Programmer Mode. This bit is used to monitor the

RDY/BSY output from the CPU. When automatic operation is being performed on

the flash memory, this bit outputs a 0, indicating that the flash memory is busy.

When automatic operation has finished, it will output 1 and the flash memory will

be ready to accept the next command. If automatic operation results in error, this

bit will continue to output 0. The bit is reset to 1 by a hardware reset.

The bit outputs 0 starting from completion of the last Bus Write cycle of the

automatic operation command sequence. For an Auto Block Erase, however, it

starts outputting 0 the Erase Hold time after the said cycle has ended. If this bit =

0, no command sequence input can be accepted.

11) FLASH Security Write Enable Register

This is an 8-bit register which allows to enable Auto Chip Erase & Unprotect

command.

FLASH Security Write Enable Resister

Bit symbol

Read/Write

R/W

After reset

FSWE

(16BH)

Function

C9H:Auto Chip Erase & Unprotect command Enable code

Others: Auto Chip Erase & Unprotect command Disable code

Figure 4.4.3(2) FLASH Security Write Enable Register

Pleas write it in the FSWE register when you execute the program with RAM.

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