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TMP92FD54AI 数据表(PDF) 79 Page - Toshiba Semiconductor |
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TMP92FD54AI 数据表(HTML) 79 Page - Toshiba Semiconductor |
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79 / 84 page  2006-01-27 92FD54AI-79 TMP92FD54AI 5.9 Serial Expansion Interface Variable 20MHz Symbol Parameter Min Max Min Max Unit tSECLK SECLK Cycle 5T 40T 250 2000 ns tLEAD SS fall SECLK 4T 200 ns tLAG SECLK SS rise 4T 200 ns tSCKH SECLK High Pulse Width tSECLK /2-9 116 ns tSCKL SECLK Low Pulse Width tSECLK /2-9 116 ns tSU Input Data Set-up tSECLK /4-10 52 ns tH Input Data Hold tSECLK /4 62 ns tV Output Data Valid t SECLK /4 62 ns tHO Output Data Hold 0 0 ns a) SEI Master (CPHA=0) SS SECLK SECLK MISO MOSI b) SEI Master (CPHA=1) SS SECLK SECLK MISO MOSI LSB Input bit 6 to 1 MSB Input LSB Output bit 6 to 1 MSB Output tV tHO tH tSU tSECLK LSB Output bit6 to 1 MSB Output LSB Input bit6 to 1 MSB Input tV tHO tSECLK tSCKH tSCKL tH tSU |
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