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ST10F271 数据表(PDF) 16 Page - STMicroelectronics

部件名 ST10F271
功能描述  16-bit MCU with 128 Kbyte Flash memory and 12 Kbyte RAM
PDF  173 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST10F271 数据表(HTML) 16 Page - STMicroelectronics

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Pin data
ST10F271
16/173
P4.0 –P4.7
85-92
I/O
Port 4 is an 8-bit bidirectional I/O port. It is bit-wise programmable for input or
output via direction bit. Programming an I/O pin as input forces the corresponding
output driver to high impedance state. The input threshold is selectable (TTL or
CMOS). Port 4.4, 4.5, 4.6 and 4.7 outputs can be configured as push-pull or open
drain drivers.
In case of an external bus configuration, Port 4 can be used to output the
segment address lines:
85
O
P4.0
A16
Segment address line
86
O
P4.1
A17
Segment address line
87
O
P4.2
A18
Segment address line
88
O
P4.3
A19
Segment address line
89
O
P4.4
A20
Segment address line
I
CAN2_RxD
CAN2: receive data input
I/O
SCL
I2C Interface: serial clock
90
O
P4.5
A21
Segment address line
I
CAN1_RxD
CAN1: receive data input
I
CAN2_RxD
CAN2: receive data input
91
O
P4.6
A22
Segment address line
O
CAN1_TxD
CAN1: transmit data output
O
CAN2_TxD
CAN2: transmit data output
92
O
P4.7
A23
Most significant segment address line
O
CAN2_TxD
CAN2: transmit data output
I/O
SDA
I2C Interface: serial data
RD
95
O
External memory read strobe. RD is activated for every external instruction or
data read access.
WR/WRL
96
O
External memory write strobe. In WR-mode this pin is activated for every external
data write access. In WRL mode this pin is activated for low byte data write
accesses on a 16-bit bus, and for every data write access on an 8-bit bus. See
WRCFG in the SYSCON register for mode selection.
READY/
READY
97
I
Ready input. The active level is programmable. When the ready function is
enabled, the selected inactive level at this pin, during an external memory
access, will force the insertion of waitstate cycles until the pin returns to the
selected active level.
ALE
98
O
Address latch enable output. In case of use of external addressing or of
multiplexed mode, this signal is the latch command of the address lines.
Table 1.
Pin description (continued)
Symbol
Pin
Type
Function



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