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ST10F271 数据表(PDF) 33 Page - STMicroelectronics |
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ST10F271 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 173 page  ST10F271 Internal Flash memory 33/173 5.4.9 Flash address register low 5.4.10 Flash address register high 5.4.11 Flash error register Flash Error register, as well as all the other Flash registers, can be properly read only once LOCK bit of register FCR0L is low. Nevertheless, its content is updated when also BSY0 bit is reset as well; for this reason, it is definitively meaningful reading FER register content only when LOCK bit and BSY0 bit are cleared. Table 15. Flash data register 1 high Bit Function DIN(31:16) Data Input 31:16 These bits must be written with the Data to program the Flash with the following operations: Word Program (32-bit), Double Word Program (64-bit) and Set Protection. FARL (0x08 0010) FCR Reset value: 0000h 15 14 13 12 11 10 987 65432 10 ADD15ADD14ADD13ADD12ADD11ADD10 ADD9 ADD8 ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 reserved RW RW RW RW RW RW RW RW RW RW RW RW RW RW Table 16. Flash address register low Bit Function ADD(15:2) Address 15:2 These bits must be written with the Address of the Flash location to program in the following operations: Word Program (32-bit) and Double Word Program (64-bit). In Double Word Program bit ADD2 must be written to ‘0’. FARH (0x08 0012) FCR Reset value: 0000h 15 14 13 12 11 10 987 65432 10 reserved ADD20 ADD19 ADD18 ADD17 ADD16 RW RW RW RW RW Table 17. Flash address register high Bit Function ADD(20:16) Address 20:16 These bits must be written with the Address of the Flash location to program in the following operations: Word Program and Double Word Program. FER (0x8 0014h) FCR Reset value: 0000h 15 14 13 12 11 10 987 65432 10 reserved WPF RESER SEQER reserved 10ER PGER ERER ERR |
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