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Data Sheet

ADE9103/ADE9112/ADE9113

APPLICATIONS INFORMATION

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Rev. A | 36 of 55

Power-Up Procedure for Systems with Multiple

Devices That Use a Clock Signal Generated

from a Microcontroller

For polyphase energy meters in which the microcontroller gener-

ates the clock signal used by all ADE9103/ADE9112/ADE9113

devices, the power-up procedure is as follows:

1. Supply VDD to the ADE9103/ADE9112/ADE9113 devices. To

ensure that the ADE9103/ADE9112/ADE9113 devices start

functioning correctly, the supply must reach 3.3 V − 10% in

less than 16 ms from approximately a 2.5 V level.

2. Generate the clock signal from the microcontroller to all

ADE9103/ADE9112/ADE9113 devices.

3. The DC-to-DC converters power up and supply the isolated

side of the ADE9112/ADE9113 devices. The Σ-Δ modulators

then become functional. This process takes approximately

62 ms to execute when the recommended capacitors on

the VDDISO, LDO, and REFOUT pins described in Table 12

are used. After this time, the isolated sides of the ADE9112/

ADE9113 devices are fully functional. While the ADE9103 has

no isolation and is entirely powered by VDD, the power-up

timing remains the same.

4. Read the STATUS0 registers of the ADE9103/ADE9112/

ADE9113 devices until Bit 5 (RESET_DONE) is set to 1,

indicating that the nonisolated side of the ADE9103/ADE9112/

ADE9113 devices is fully functional with default settings, which

happens approximately 32 ms after the clock signal is provided.

5. Initialize the CONFIG0 register of the ADE9103/ADE9112/

ADE9113 devices with Bit 0 (CLKOUT_EN) cleared to 0 to

avoid generating an unnecessary clock at the CLKOUT/DREA-

DY pin. Select one ADE9112/ADE9113 device (Phase C,

for example, ADE9112C/ADE9113C) and connect the CLKOUT/

DREADY pin to an external interrupt input and output pin of the

microcontroller.

6. Execute a SYNC_SNAP = 0x02 broadcast to synchronize all

the ADE9103/ADE9112/ADE9113 devices of the meter (see the

Synchronizing Multiple ADE9103/ADE9112/ADE9113 Devices

section for more information).

7. Execute a WR_LOCK = 0xD4 write broadcast to protect the

configuration registers of all ADE9103/ADE9112/ADE9113 devi-

ces. See the Protecting the Integrity of Configuration Registers

section.

Figure 46. Power-Up Procedure for Systems with Multiple ADE9112/ADE9113 Devices Clocked from a Microcontroller

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