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ADE9113 数据表(PDF) 47 Page - Analog Devices

部件名 ADE9113
功能描述  Isolated, Sigma-Delta ADCs with SPI
PDF  55 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE9113 数据表(HTML) 47 Page - Analog Devices

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Data Sheet
ADE9103/ADE9112/ADE9113
REGISTER SUMMARY
analog.com
Rev. A | 47 of 55
In Table 19, R means a register can be read, W means a register can be written, and W1C means write 1 to clear.
Table 19. Register Summary
Address
Name
Description
Default Value
Access
0x001
SWRST
Software Reset.
0x00
W
0x002
CONFIG0
ADC Configuration.
0x02
R/W
0x003
CONFIG_FILT
Digital Filter Configuration.
0x00
R/W
0x005
CONFIG_ISO_ACC
Enable Access to Isolated (ISO) Register Space. The ISO side is Pin 1 to Pin 14.
0x00
R/W
0x006
CRC_RESULT_HI
Background Register Map CRC Most Significant Byte.
0xDD
R
0x007
CRC_RESULT_LO
Background Register Map CRC Least Significant Byte.
0x8D
R
0x008
EFUSE_REFRESH
eFuse Refresh.
0x00
R/W
0x009
EMI_CONFIG
Configure Isolation Frequency Hopping Method.
0x03
R/W
0x00A
EMI_HI_MASK
Emissions Mask, High Frequency Bounds.
0x00
R/W
0x00B
EMI_LO_MASK
Emissions Mask, Low Frequency Bounds.
0x00
R/W
0x00C
EMI_HI_LIMIT
Factory Stored High Frequency Limit. Corresponds to emissions at 420 MHz.
0x00
R
0x00D
EMI_MID_LIMIT
Factory Stored Center Frequency Value. Corresponds to emissions at 360 MHz.
0x00
R
0x00E
EMI_LO_LIMIT
Factory Stored Low Frequency Limit. Corresponds to emissions at 300 MHz.
0x00
R
0x00F
MASK0
Interrupt Mask 0 Register. Mask register for STATUS0.
0x00
R/W
0x010
MASK1
Interrupt Mask 1 Register. Mask register for STATUS1.
0x00
R/W
0x011
MASK2
Interrupt Mask 2 Register. Mask register for STATUS2.
0x10
R/W
0x012
CONFIG_ZX
Zero-Crossing Configuration.
0x00
R/W
0x013
SCRATCH
Software Debug Register for Testing SPI R/W.
0x00
R/W
0x014
SYNC_SNAP
ADC Synchronization Register.
0x00
R/W
0x017
SNAPSHOT_COUNT_HI
System Timing Controller Counter Most Significant Byte.
0x00
R
0x018
SNAPSHOT_COUNT_LO
System Timing Controller Counter Least Significant Byte.
0x00
R
0x01F
WR_LOCK
Configuration Lock Register.
0x5E
R/W
0x020
STATUS0
Latched Status of High Priority Interrupts.
0x00
R/W
0x021
STATUS1
Latched Status of Low Priority Interrupts.
0x00
R/W
0x022
STATUS2
Latched Status of Isolated ADC Interrupts.
0x00
R/W
0x023
COM_FLT_TYPE
ISO to NONISO Communications Fault Type.
0x00
R
0x024
COM_FLT_COUNT
ISO to NONISO Communications Fault Count.
0x00
R
0x025
CONFIG_CRC
Configuration of Background Register Map CRC.
0x00
R/W
0x026
I_WAV_HI
Current Channel Waveform Data Most Significant Byte.
0x00
R/W
0x027
I_WAV_MD
Current Channel Waveform Data Middle Byte.
0x00
R/W
0x028
I_WAV_LO
Current Channel Waveform Data Least Significant Byte.
0x00
R/W
0x029
V1_WAV_HI
V1 Channel Waveform Data Most Significant Byte.
0x00
R/W
0x02A
V1_WAV_MD
V1 Channel Waveform Data Middle Byte.
0x00
R/W
0x02B
V1_WAV_LO
V1 Channel Waveform Data Least Significant Byte.
0x00
R/W
0x02C
V2_WAV_HI
V2 Channel Waveform Data Most Significant Byte.
0x00
R/W
0x02D
V2_WAV_MD
V2 Channel Waveform Data Middle Byte.
0x00
R/W
0x02E
V2_WAV_LO
V2 Channel Waveform Data Least Significant Byte.
0x00
R/W
0x075
UNIQUE_PART_ID_5
Unique Part ID Most Significant Byte (Byte 5).
0x00
R
0x076
UNIQUE_PART_ID_4
Unique Part ID Byte 4.
0xXX1
R
0x077
UNIQUE_PART_ID_3
Unique Part ID Byte 3.
0xXX1
R
0x078
UNIQUE_PART_ID_2
Unique Part ID Byte 2.
0xXX1
R
0x079
UNIQUE_PART_ID_1
Unique Part ID Byte 1.
0xXX1
R
0x07A
UNIQUE_PART_ID_0
Unique Part ID Least Significant Byte (Byte 0).
0xXX1
R
0x07D
SILICON_REVISION
Revision Value of ISO and NONISO Silicon.
0x322
R
0x07E
VERSION_PRODUCT
Product Version Identifier.
0x00
R



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