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L9963E 数据表(PDF) 152 Page - STMicroelectronics |
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L9963E 数据表(HTML) 152 Page - STMicroelectronics |
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152 / 184 page  Figure 47. How to handle unmounted cells L9963 VBAT GNDREF CGND DGND AGND ISENSEp ISENSEm RSENSE S2 B2_1 C1 S1 C0 RLPF RLPF RDIS RDIS CLPF CLPF CESD CESD CELL1 CELL2 C14 S4 B4_3 C3 S3 C2 RLPF RLPF RDIS RDIS CLPF CLPF CESD CESD CELL3 CELL4 S6 B6_5 C5 S5 C4 RLPF RLPF RDIS RDIS CLPF CLPF CESD CESD CELL5 CELL6 S8 B8_7 C7 S7 C6 RLPF CESD CELL7 CELL8 S10 B10_9 C9 S9 C8 CELL9 CELL10 S12 B12_11 C11 S11 C10 RLPF RDIS RDIS CLPF CLPF CESD CELL11 CELL12 S14 B14_13 C13 S13 C12 RLPF RLPF RDIS RDIS CLPF CLPF CESD CESD CELL13 CELL14 RLPF CESD FR_BAT BATT_MINUS BATT_PLUS CISENSE_1 GND CBAT_1 CVCOM CVANA RFAULTL RBAT_DOWN RFAULT_DOWN FAULT_DOWN BAT_DOWN COPT BATT_UP CFLTH DZ_FLT RFLT_PD FAULT_UP ISOLp_UP ISOLm_UP ISOHp_DOWN ISOHm_DOWN RTERM RTERM GPIO9 RNTC RVTREF CNTC RGPIO GPIO8 RNTC RVTREF CNTC RGPIO GPIO7 RNTC RVTREF CNTC RGPIO GPIO6 RNTC RVTREF CNTC RGPIO GPIO5 RNTC RVTREF CNTC RGPIO GPIO4 RNTC RVTREF CNTC RGPIO GPIO3 RNTC RVTREF CNTC RGPIO CBOOT TRANSF TRANSF OPT DZBAT CVTREF CESD RISENSE RISENSE CESD CBAT_2 CISENSE_2 CISENSE_3 VCELL11_EN = 0 VCELL10_EN = 0 VCELL9_EN = 0 VCELL8_EN = 0 VCELL7_EN = 0 Couple of adjacent cells (odd+even) Remaining spare cell (odd) RLPF CESD In case BOM components are left mounted, then PCB connectors must be shorted together (as for the spare odd cell) 1kΩ 6.10.2 Unused GPIOs The unused GPIOs must be connected in a proper way in order to avoid unwanted leakage. 6.10.2.1 GPIO3-9 When one pin among GPIO3 to GPIO9 is not used in application: • It must be shorted to GND plane (AGND is recommended) • It must be configured as Digital Input by user SW, in order to avoid being converted during Voltage Conversion Routine L9963E Unused pins DS13636 - Rev 12 page 152/184 |
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