ST52T430 datasheet(77/88 Pages) STMICROELECTRONICS

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ST52T430/E430

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12.8 Port Pin Characteristics

12.8.1 General Characteristics.

Subject to general operating condition for VDD, fosc, and TA , unless otherwise specified.

Notes:

1. Unless otherwise specified, typical data is based on TA=25 °C and VDD=5 V

2. Hysteresis voltage between Schmitt trigger switching level. Based on characterization results, not

tested in production.

3. Configuration is not recommended, all unused pins must be kept at a fixed voltage: using the output

mode of the I/O for example or an external pull-up or pull-down resistor (see Figure 12.11. Data based on

design simulation and/or technology characteristics is not tested in production.

Figure 12.11 Recommended configuration for unused pins

Symbol

Parameter

Condition

Min

Typ1)

Max

Unit

VIL

CMOS type low level input voltage.

Port B pins. (See Fig 11.13)

1.5

TTL type Schmitt trigger low level

input voltage. Port A and Port C

pins. (See Fig. 11.12)

0.8

VIH

CMOS type high level input voltage.

Port B pins. (See Fig 11.13)

3.3

TTL type Schmitt trigger high level

input voltage. Port A and Port C

pins. (See Fig. 11.12)

2.2

Vhys

Schmitt trigger voltage hysteresis 2)

Input leakage current

VSS≤VIN≤VDD

±1

µA

Static current consumption3)

Floating input mode

200

VDD

ST52

UNUSED I/O PORT

10k

UNUSED I/O PORT

ST52

10k

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