ST52T430 datasheet(80/88 Pages) STMICROELECTRONICS

80 / 88 page

ST52T430/E430

80/88

12.9 Control Pin Characteristics

12.9.1 RESET pin.

Subject to general operating conditions for VDD, fosc, and TA, unless otherwise specified

12.9.2 VPP pin.

Subject to general operating conditions for VDD, fosc, and TA,unless otherwise specified.

Notes:

1. Data is based on characterization results, not tested in production.

2. Hysteresis voltage between Schmitt trigger switching level.

Based on characterization results not tested in production.

3. Data is based on design simulation and/or technology characteristics, not tested in production.

4. In working mode VPP must be tied to VSS

Table 12.13 Reset pin

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage1)

VDD= 5 V

1.8

VIH

Input high level voltage1)

VDD= 5 V

2.8

Vhys

Schmitt trigger voltage hysteresis2)

VDD= 5 V

0.8

tw(RSTL)out

General reset pulse duration

µS

th(RSTL)int

External reset pulse hold time

Table 12.14 VPP

4) pin

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage3)

VSS

0.2

VIH

Input high level voltage3)

VDD-0.1

12.6

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