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ST52T430 数据表(PDF) 22 Page - STMicroelectronics |
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ST52T430 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 88 page ![]() ST52T430/E430 22/88 Notes: I affected - not affected Figure 2.5 Multiplication Figure 2.6 Division MDGI MDGI 1 6 - - - RETI RETI 1 12 - - - RINT RINT INT 2 8 - - - UDGI UDGI 1 6 - - - UEGI UEGI 1 7/15 - - - WAITI WAITI 1 7/14 - - - Table 2.9 Control Instructions Set Control Instructions Mnemonic Instruction Bytes Cycles Z S C FUZZY FUZZY 1 5 - - - NOP NOP 1 6 - - - WDTRFR WDTRFR 1 7 - - - WDTSLP WDTSLP 1 6 - - - Table 2.8 Interrupt Instructions Set (continued) RAM 0 1 2 i j+1 j-1 j 255 253 254 REG. j REG. j+1 REMAINDER QUOTIENT REG. i : i-1 i+1 RAM 0 1 2 i j+1 j-1 j 255 253 254 REG. j REG. i LSB MSB X 16 Bit |
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