ST52T430 datasheet(27/88 Pages) STMICROELECTRONICS

27 / 88 page

ST52T430/E430

27/88

4 INTERRUPTS

The Control Unit (CU) responds to peripheral

events and external events via its interrupt

channels.

When such an events occur, if the related interrupt

is not masked and according to a priority order, the

current program execution can be suspended to

allow the CU to execute a specific response

routine.

Each interrupt is associated with an interrupt

vector that contains the memory address of the

related interrupt service routine. Each vector is

located in the Program Space (EPROM Memory)

at a fixed address (see Interrupt Vectors Table

4.2).

4.1 Interrupt Operation

If there are pending interrupts at the end of an

arithmetic or logic instruction, the one with the

highest priority is passed. Passing an interrupt

means storing the arithmetic flags and the current

PC in the stack and executing the associated

Interrupt routine, whose address is located in three

bytes of the EPROM memory location between

address 3 and 20.

The Interrupt routine is performed as a normal

code, checking if a higher priority interrupt has to

be passed at the end of each instruction. An

Interrupt request with the higher priority stops the

lower priority Interrupt. The Program Counter and

the arithmetic flags are stored in the stack.

With the RETI (Return from Interrupt) instruction

the arithmetic flags and Program Counter (PC) are

restored from the top of the stack. This stack was

already described in section RAM and STACK.

An Interrupt request cannot stop processing of the

fuzzy rule, but this is passed only after the end of

a fuzzy rule or at the end of a logic, or arithmetic

instruction.

NOTE: A fuzzy routine can only be interrupted

in the Main program. An interrupt request

cannot stop a Fuzzy function that is running

inside another interrupt routine. In order to use

a Fuzzy function inside an interrupt routine, the

user MUST include the Fuzzy function between

an UDGI (MDGI) instruction and an UEGI

(MEGI)

instruction

(see

the

following

paragraphs), so that the interrupt request may

be disabled during the execution of the fuzzy

function.

4.2 Global Interrupt Request Enabling

When an Interrupt occurs, it generates a Global

Interrupt Pending (GIP), that can be masked by

software. After a GIP a Global Interrupt Request

(GIR) will be generated and Interrupt service

Figure 4.1 Interrupt Flow

Figure 4.2 Interrupt Vectors mapping

Figure 4.3 Global Interrupt Request generation

NORMAL

PROGRAM

FLOW

INTERRUPT

SERVICE

ROUTINE

RETI

INSTRUCTION

INTERRUPT

INT_ADC

INT_TIMER/PWM2

INT_SCI

INTERRUPT

VECTORS

INT_EXT

INT_TIMER/PWM1

INT_TIMER/PWM0

Global Interrupt

Pending

User Global

Interrupt Mask

Macro Global

Global Interrupt

Request

ST52T430 数据表(PDF) 27 Page - STMicroelectronics

ST52T430 数据表(HTML) 27 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

数据表下载

链接网址

ST52T430 数据表(PDF) 27 Page - STMicroelectronics

ST52T430 数据表(HTML) 27 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

数据表 下载

链接网址

数据表下载