ST52T430 datasheet(53/88 Pages) STMICROELECTRONICS

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ST52T430/E430

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The Output Register PWM_x_RELOAD value is

automatically reloaded when Counter x restarts

counting.

The 16-bit Prescaler x divides the master clock,

CLKM, or, only for TIMER0, the external T0CLK

signal, by the 16-bit Prescaler x.

NOTE: The external clock signal, applied on

T0CLK pin must have a frequency at least two

times smaller than the internal master clock.

The Prescaler x output can be selected by setting

PRESCx bit of REG_CONF6, REG_CONF9 and

REG_CONF11 registers (see Table 10.2, Table

10.5 and Table 10.7).

When Counter x reaches the Peripheral Register

PWM_x_COUNT

value

(Compare

Value),

TIMERxOUT signal changes from high to low level,

up to the next counter start.

The period of the PWM signal is obtained by using

the following equation:

T = (255 - PWM _x_RELOAD)x TMR CLKx

where TMRCLKx is the output of the 16-bit

prescaler x.

The duty cycle of the PWM signal is controlled by

the Output Register PWM_x_COUNT:

Ton =(PWM_x_COUNT- PWM_x_RELOAD)*

TMRCLKx

If the Output Register PWM_x_COUNT value is

255 the TIMERxOUT signal is always at a high

level.

If the Output Register PWM_x_COUNT is 0, or

less

than

the

PWM_x_RELOAD

value,

TIMERxOUT signal is always at a low level.

NOTE. If PWM_x_RELOAD value increases the

duty cycle resolution decreases.

By using a 20 MHz clock master a PWM frequency

in the range 1.2 Hz to 78.43 Khz can be obtained.

NOTE: loading new values of the counter in the

PWM_x_COUNT register, in order to avoid side

effects, the PWM/Timer counter is updated only

at the end of the counting cycle.

WARNING: loading new values of the reload in

the PWM_x_RELOAD registers, the PWM/Timer

is immediately set on-fly. This can cause some

side effects during the current counting cycle.

The next cycles work normally. This occurs

both in Timer and in PWM mode.

When the Timers are in Reset, or when the

device is reset, TxOut pins go in threestate. If

these outputs are used to drive external

devices it is recommended to put a pull-up or a

pull-down resistor.

10.3 Timer Interrupt

TIMERx can be programmed to generate an

Interrupt request until the end of the count or when

there is an external TSTART signal. The Timer can

generate programmable Interrupts into 4 different

modes:

Interrupt mode 1: Interrupt on counter Stop.

Interrupt mode 2: Interrupt on Rising Edge of

TIMEROUT.

Interrupt mode 3: Interrupt on Falling Edge of

TIMEROUT.

Interrupt mode 4: Interrupt on both edges of

TIMEROUT.

Interrupt mode can be selected by means of

INTSLx and INTEx bits of the REG_CONF5,

REG_CONF8 and REG_CONF10 registers (see

Table 10.1, Table 10.4 and Table 10.6).

NOTE: the interrupt on TIMEROUT rising edge

is also generated after the Start.

WARNING: the first interrupt after starting

PWM is not generated if the counter value is 0,

255, or lower than the reload value. If the PWM/

Timer is configured with the Interrupt on Stop

and the Start/Stop is configured as external, a

low signal in the STRT pin determines a PWM/

Timer interrupt even if the peripheral is off. If

the interrupt is configured on falling edge, a

reset signal generates an interrupt request.

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