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M32C/86 数据表(PDF) 142 Page - Renesas Technology Corp |
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M32C/86 数据表(HTML) 142 Page - Renesas Technology Corp |
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142 / 505 page  Page 119 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 11. Interrupts ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Function Interrupt Request Register Bit Symbol Symbol Address After Reset IIO0IR to IIO5IR, IIO8IR to IIO11IR See below 0000 000X2 RW RW RW RW RW RW RW (Note 1) (b0) (b3) (Note 1) (Note 1) (Note 1) (Note 1) (Note 1) 0 : Requests no interrupt 1 : Requests an interrupt(2) 0 : Requests no interrupt 1 : Requests an interrupt(2) 0 : Requests no interrupt 1 : Requests an interrupt(2) 0 : Requests no interrupt 1 : Requests an interrupt(2) 0 : Requests no interrupt 1 : Requests an interrupt(2) 0 : Requests no interrupt 1 : Requests an interrupt(2) Nothing is assigned. When write, set to "0". When read, its content is indeterminate. NOTES: 1. See table below for bit symbols. 2. Only "0" can be set (nothing is changed even if "1" is set). Symbol IIO0IR IIO1IR IIO2IR IIO3IR IIO4IR IIO5IR IIO8IR IIO9IR IIO10IR IIO11IR Address 00A016 00A116 00A216 00A316 00A416 00A516 00A816 00A916 00AA16 00AB16 Bit 7 CAN10R CAN11R - - SRT0R CAN12R - CAN00R CAN01R CAN02R Bit 6 - - - - SRT1R CAN1WUR - - - - Bit 5 SIO0RR SIO0TR SIO1RR SIO1TR - - - - - - Bit 0 - - - - - - - - - - Bit 4 G0RIR G0TOR G1RIR G1TOR BT1R - - - - - Bit 3 - - - - - - - - - - Bit 2 TM13R/PO13R TM14R/PO14R TM12R/PO12R TM10R/PO10R TM17R/PO17R - - - - - Bit 1 - - - - - - TM11R/PO11R TM15R/PO15R TM16R/PO16R - Bit Symbols for the Interrupt Request Register BT1R TM1jR PO1jR SIOiRR SIOiTR GiTOR GiRIR SRTiR CAN0kR CAN1mR CAN1WUR - : Intelligent I/O Base Timer Interrupt Request : Intelligent I/O Time Measurement j Interrupt Request : Intelligent I/O Waveform Generating Function j Interrupt Request : Intelligent I/O Communication Unit i Receive Interrupt Request : Intelligent I/O Communication Unit i Transmit Interrupt Request : Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (TO: Output to Transmit) : Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Request (RI: Input to Receive) : Intelligent I/O Special Communication Function Interrupt Request : CAN0 Communication Function Interrupt Request (k = 0 to 2) : CAN1 Communication Function Interrupt Request (m = 0 to 2) : CAN1 Wake-up Interrupt Request : Reserved Bit. Set to "0". i = 0, 1 j = 0 to 7 Reserved bit. Set to "0". When read, its content is indeterminate. RW b7 b6 b5 b4 b3 b2 b1 b0 0 Figure 11.14 IIO0IR to IIO5IR, IIO8IR to IIO11IR Registers |
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