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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 367 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 367 Page - Renesas Technology Corp |
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367 / 923 page  Rev. 2.00, 09/03, page 337 of 890 9.3 CPU Interface 9.3.1 16-Bit Accessible Registers The timer counters (16TCNTs), general registers A and B (GRAs and GRBs) are 16-bit registers, and are linked to the CPU by an internal 16-bit data bus. These registers can be written or read a word at a time, or a byte at a time. Figures 9.4 and 9.5 show examples of word read/write access to a timer counter (16TCNT). Figures 9.6 to 9.9 show examples of byte read/write access to 16TCNTH and 16TCNTL. On-chip data bus CPU H L Bus interface H L Module data bus 16TCNTH 16TCNTL Figure 9.4 16TCNT Access Operation [CPU → → → → 16TCNT (Word)] On-chip data bus CPU H L Bus interface H L Module data bus 16TCNTH 16TCNTL Figure 9.5 Access to Timer Counter (CPU Reads 16TCNT, Word) |
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