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H8/3028F 数据表(PDF) 397 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 397 Page - Renesas Technology Corp |
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397 / 923 page ![]() Rev. 2.00, 09/03, page 367 of 890 Contention between Counter Clearing by Input Capture and Counter Increment: If an input capture signal and counter increment signal occur simultaneously, the counter is cleared according to the input capture signal. The counter is not incremented by the increment signal. The value before the counter is cleared is transferred to the general register. See figure 9.43. φ Input capture signal Counter clear signal 16TCNT input clock 16TCNT GR N N H'0000 Figure 9.43 Contention between Counter Clearing by Input Capture and Counter Increment |
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