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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 400 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 400 Page - Renesas Technology Corp |
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400 / 923 page  Rev. 2.00, 09/03, page 370 of 890 16-bit timer Operating Modes Table 9.7 (a) 16-bit timer Operating Modes (Channel 0) Register Settings TSNC TMDR TIOR0 16TCR0 Synchro- Clear Clock Operating Mode nization MDF FDIR PWM IOA IOB Select Select Synchronous preset SYNC0 = 1 —— PWM mode —— PWM0 = 1 — * Output compare A —— PWM0 = 0 IOA2 = 0 Other bits unrestricted Output compare B — — IOB2 = 0 Other bits unrestricted Input capture A —— PWM0 = 0 IOA2 = 1 Other bits unrestricted Input capture B —— PWM0 = 0 IOB2 = 1 Other bits unrestricted Counter By compare —— CCLR1 = 0 clearing match/input CCLR0 = 1 capture A By compare —— CCLR1 = 1 match/input CCLR0 = 0 capture B Syn- SYNC0 = 1 —— CCLR1 = 1 chronous CCLR0 = 1 clear Legend: Setting available (valid). — Setting does not affect this mode. Note: * The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited. |
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