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H8/3028F 数据表(PDF) 486 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 486 Page - Renesas Technology Corp |
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486 / 923 page ![]() Rev. 2.00, 09/03, page 456 of 890 13.2.5 Serial Mode Register (SMR) SMR is an 8-bit register that specifies the SCI's serial communication format and selects the clock source for the baud rate generator. C/ A CHR PE O/ E STOP MP CKS1 CKS0 R/W 0 0 000 0 0 0 R/W R/W R/W R/W R/W R/W R/W Initial value Read/Write Bit 76 54 32 1 0 Clock select 1/0 These bits select the baud rate generator's clock source Communication mode Selects asynchronous or synchronous mode Character length Selects character length in asynchronous mode Parity enable Enables or disables the addition of a parity bit Parity mode Selects even or odd parity Stop bit length Selects the stop bit length Multiprocessor mode Selects the multiprocessor function The CPU can always read and write SMR. SMR is initialized to H'00 by a reset and in standby mode. Bit 7—Communication Mode (C/ A A A A)/GSM Mode (GM): The function of this bit differs for the normal serial communication interface and for the smart card interface. Its function is switched with the SMIF bit in SCMR. |
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