H8SLASH3028F datasheet(499/923 Pages) RENESAS

499 / 923 page

Rev. 2.00, 09/03, page 469 of 890

For serial communication interface (SMIF bit in SCMR cleared to 0): Indicates that when the

last bit of a serial character was transmitted TDR did not contain valid transmit data, so

transmission has ended. The TEND flag is a read-only bit and cannot be written.

Bit 2

TEND

Description

Transmission is in progress

[Clearing conditions]

• Read TDRE when TDRE = 1, then write 0 in TDRE

• The DMAC writes data in TDR

End of transmission

(Initial value)

[Setting conditions]

• The chip is reset or enters standby mode

• The TE bit in SCR is cleared to 0

• TDRE is 1 when the last bit of a 1-byte serial transmit character is

transmitted

For smart card interface (SMIF bit in SCMR set to 1): Indicates that when the last bit of a

serial character was transmitted TDR did not contain valid transmit data, so transmission has

ended. The TEND flag is a read-only bit and cannot be written.

Bit 2

TEND

Description

Transmission is in progress

[Clearing conditions]

• Read TDRE when TDRE = 1, then write 0 in TDRE

• The DMAC writes data in TDR

End of transmission

(Initial value)

[Setting conditions]

• The chip is reset or enters standby mode

• The TE bit is cleared to 0 in SCR and the FER/ERS bit is also cleared to 0

• TDRE is 1 and FER/ERS is 0 (normal transmission) 2.5 etu (when GM = 0)

or 1.0 etu (when GM = 1) after a 1-byte serial character is transmitted

Note: etu (Elementary time unit: the time for transfer of one bit)

H8/3028F 数据表(PDF) 499 Page - Renesas Technology Corp

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