H8SLASH3028F datasheet(516/923 Pages) RENESAS

516 / 923 page

Rev. 2.00, 09/03, page 486 of 890

Transmitting Serial Data (Asynchronous Mode): Figure 13.5 shows a sample flowchart for

transmitting serial data and indicates the procedure to follow.

Yes

<End>

Clear TE bit to 0 in SCR

Clear DR bit to 0 and set

DDR bit to 1

TEND = 1

Output break signal?

Read TEND flag in SSR

All data transmitted?

TDRE = 1

Yes

Read TDRE flag in SSR

(3)

Initialize

(4)

Write transmit data in TDR

and clear TDRE flag to 0 in SSR

(1)

(2)

(3)

(4)

Start transmitting

(1)

(2)

Yes

SCI initialization:

the transmit data output function of the TxD pin is

selected automatically.

SCI status check and transmit data write:

read SSR and check that the TDRE flag is set to 1,

then write transmit data in TDR and clear the TDRE

flag to 0.

To continue transmitting serial data:

after checking that the TDRE flag is 1, indicating that

data can be written, write data in TDR, then clear the

TDRE flag to 0. When the DMAC is activated by a

transmit-data-empty interrupt request (TXI) to write

data in TDR, the TDRE flag is checked and cleared

automatically.

To output a break signal at the end of serial

transmission:

set the DDR bit to 1 and clear the DR bit to 0, then

clear the TE bit to 0 in SCR.

Figure 13.5 Sample Flowchart for Transmitting Serial Data

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