H8SLASH3028F datasheet(563/923 Pages) RENESAS

563 / 923 page

Rev. 2.00, 09/03, page 533 of 890

Table 14.8 Smart Card Interface Mode Operating States and Interrupt Sources

Operating State

Flag

Enable Bit

Interrupt

Source

DMAC

Activation

Transmit Mode

Normal

operation

TEND

TIE

TXI

Available

Error

ERS

RIE

ERI

Not available

Receive Mode

Normal

operation

RDRF

RIE

RXI

Available

Error

PER, ORER

RIE

ERI

Not available

Data Transfer by DMAC: The DMAC can be used to transmit and receive data in smart card

mode, as in normal SCI operations. In transmit mode, when the TEND flag is set to 1 in SSR, the

TDRE flag is set simultaneously, generating a TXI interrupt. If the TXI request is designated

beforehand as a DMAC activation source, the DMAC will be activated by the TXI request and

will transfer the next transmit data. This data transfer by the DMAC automatically clears the

TDRE and TEND flags to 0. In the event of an error, the SCI automatically retransmits the same

data, keeping the TEND flag cleared to 0 so that the DMAC is not activated. The SCI and DMAC

will therefore automatically transmit the designated number of bytes, including retransmission

when an error occurs. When an error occurs, the ERS flag is not cleared automatically, so the RIE

bit should be set to 1 to enable the error to generate an ERI request, and the ERI interrupt handler

should clear ERS.

When using the DMAC to transmit or receive, first set up and enable the DMAC, then make SCI

settings. DMAC settings are described in section 7, DMA controller.

In receive operations, an RXI interrupt is requested when the RDRF flag is set to 1 in SSR. If the

RXI request is designated beforehand as a DMAC activation source, the DMAC will be activated

by the RXI request and will transfer the received data. This data transfer by the DMAC

automatically clears the RDRF flag to 0. When an error occurs, the RDRF flag is not set and an

error flag is set instead. The DMAC is not activated. The ERI interrupt request is directed to the

CPU. The ERI interrupt handler should clear the error flags.

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