H8SLASH3028F datasheet(583/923 Pages) RENESAS

部件名	H8/3028F

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

583 / 923 page

Rev. 2.00, 09/03, page 553 of 890

15.4.3

Input Sampling and A/D Conversion Time

The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog

input at a time tD after the ADST bit is set to 1, then starts conversion. Figure 15.5 shows the A/D

conversion timing. Table 15.4 indicates the A/D conversion time.

As indicated in figure 15.5, the A/D conversion time includes tD and the input sampling time. The

length of tD varies depending on the timing of the write access to ADCSR. The total conversion

time therefore varies within the ranges indicated in table 15.4.

In scan mode, the values given in table 15.4 apply to the first conversion. In the second and

subsequent conversions the conversion time is fixed at 128 states when CKS = 0 or 66 states when

CKS = 1.

Address bus

Write signal

Input sampling

timing

ADF

(1)

(2)

SPL

CONV

Legend

(1):

(2):

t :

SPL

CONV

ADCSR write cycle

ADCSR address

Synchronization delay

Input sampling time

A/D conversion time

Figure 15.5 A/D Conversion Timing

H8/3028F 数据表(PDF) 583 Page - Renesas Technology Corp