H8SLASH3028F datasheet(585/923 Pages) RENESAS

585 / 923 page

Rev. 2.00, 09/03, page 555 of 890

15.5

Interrupts

The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt

request can be enabled or disabled by the ADIE bit in ADCSR. The ADI interrupt request can be

designated as a DMAC activation source. In this case, an interrupt request is not sent to the CPU.

15.6

Usage Notes

When using the A/D converter, note the following points:

1. Analog Input Voltage Range: During A/D conversion, the voltages input to the analog input

pins should be in the range AVSS ≤ ANn ≤ VREF.

2. Relationships of AVCC and AVSS to VCC and VSS: AVCC, AVSS, VCC, and VSS should be related

as follows: AVSS = VSS. AVCC and AVSS must not be left open, even if the A/D converter is not

used.

3. VREF Programming Range: The reference voltage input at the VREF pin should be in the range

VREF ≤ AVCC.

4. Note on Board Design: In board layout, separate the digital circuits from the analog circuits as

much as possible. Particularly avoid layouts in which the signal lines of digital circuits cross or

closely approach the signal lines of analog circuits. Induction and other effects may cause the

analog circuits to operate incorrectly, or may adversely affect the accuracy of A/D conversion.

The analog input signals (AN0 to AN7), analog reference voltage (VREF), and analog supply

voltage (AVCC) must be separated from digital circuits by the analog ground (AVSS). The

analog ground (AVSS) should be connected to a stable digital ground (VSS) at one point on the

board.

5. Note on Noise: To prevent damage from surges and other abnormal voltages at the analog

input pins (AN0 to AN7) and analog reference voltage pin (VREF), connect a protection circuit

like the one in figure 15.7 between AVCC and AVSS. The bypass capacitors connected to AVCC

and VREF and the filter capacitors connected to AN0 to AN7 must be connected to AVSS. If

filter capacitors like the ones in figure 15.7 are connected, the voltage values input to the

analog input pins (AN0 to AN7) will be smoothed, which may give rise to error. Error can also

occur if A/D conversion is frequently performed in scan mode so that the current that charges

and discharges the capacitor in the sample-and-hold circuit of the A/D converter becomes

greater than that input to the analog input pins via input impedance Rin. The circuit constants

should therefore be selected carefully.

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