H8SLASH3028F datasheet(625/923 Pages) RENESAS

625 / 923 page

Rev. 2.00, 09/03, page 595 of 890

On-Chip RAM Area Divisions in Boot Mode: In boot mode, the RAM area is divided into an

area used by the boot program and an area to which the user program is transferred via the SCI, as

shown in figure 18.7. The boot program area becomes available when a transition is made to the

execution state for the user program transferred to RAM.

H'FFBF20

H'FFC71F

H'FFC720

User program

transfer area

Boot program

area

H'FFFF1F

Note: The boot program area cannot be used until a transition is made to the execution state

for the user program transferred to RAM. Note also that the boot program remains in

this area in RAM even after control branches to the user program.

Figure 18.7 RAM Areas in Boot Mode

Notes on Use of Boot Mode:

1. When the H8/3028F-ZTAT chip comes out of reset in boot mode, it measures the low period

of the input at the SCI’s RxD1 pin. The reset should end with RxD1 high. After the reset ends,

it takes about 100 states for the chip to get ready to measure the low period of the RxD1 input.

2. In boot mode, if any data has been programmed into the flash memory (if all data is not 1), all

flash memory blocks are erased. Boot mode is for use when user program mode is unavailable,

such as the first time on-board programming is performed, or if the program activated in user

program mode is accidentally erased.

3. Interrupts cannot be used while the flash memory is being programmed or erased.

4. The RxD1 and TxD1 lines should be pulled up on the board.

5. Before branching to the user program the H8/3028F-ZTAT terminates transmit and receive

operations by the on-chip SCI (channel 1) (by clearing the RE and TE bits to 0 in the serial

control register (SCR)), but the adjusted bit rate value remains set in the bit rate register

(BRR). The transmit data output pin, TxD1, goes to the high-level output state (P91DDR = 1 in

P9DDR, P91DR = 1 in P9DR).

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