H8SLASH3028F datasheet(626/923 Pages) RENESAS

626 / 923 page

Rev. 2.00, 09/03, page 596 of 890

The contents of the CPU’s internal general registers are undefined at this time, so these

registers must be initialized immediately after branching to the user program. In particular,

since the stack pointer (SP) is used implicitly in subroutine calls, etc., a stack area must be

specified for use by the user program.

The initial values of other on-chip registers are not changed.

6. Boot mode can be entered by setting pins MD0 to MD2 and FWE in accordance with the mode

setting conditions shown in table 18.6, and then executing a reset-start.

a. When switching from boot mode to normal mode, the boot mode state within the chip must

first be cleared by reset input via the

RES pin*1. The RES pin must be held low for at least

20 system clock cycles.*3

b. Do not change the input levels of the mode pins (MD2 to MD0) or the FWE pin in boot

mode. To change the mode, the

RES pin must first be driven low to set the reset state. Also,

if a watchdog timer reset occurs in the boot mode state, the MCU’s internal state will not

be cleared, and the on-chip boot program will be restarted regardless of the mode pin

states.

c. The FWE pin must not be driven low while the boot program is running or flash memory is

being programmed or erased*2.

7. If the mode pin input levels are changed (for example, from low to high) during a reset, the

state of ports with multiplexed address functions and bus control output signals (

CSn, AS, RD,

LWR, HWR) may also change according to the change in the MCU’s operating mode.

Therefore, care must be taken to make pin settings to prevent these pins from being used

directly as output signal pins during a reset, or to prevent collision with signals outside the

MCU.

H8/3028F-ZTAT

MD2

MD1

MD0

FWE

RES

CSn

System

control

unit

External

memory,

etc.

Notes: 1. Mode pin and FWE pin input must satisfy the mode programming setup time (tMDS)

with respect to the reset release timing.

2. For further information on FWE application and disconnection, see section 18.11,

Flash Memory Programming and Erasing Precautions.

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