H8SLASH3028F datasheet(643/923 Pages) RENESAS

643 / 923 page

Rev. 2.00, 09/03, page 613 of 890

H'00000

H'01000

H'02000

H'03000

H'04000

H'05000

H'06000

H'07000

H'08000

H'5FFFF

Flash memory

EB8 to EB13

This area can be accessed

from both the RAM area

and flash memory area

EB0

EB1

EB2

EB3

EB4

EB5

EB6

EB7

H'FFE000

H'FFEFFF

H'FFFF1F

On-chip RAM

Figure 18.14 Example of RAM Overlap Operation

Example of Flash Memory Block Area EB0 Overlapping

1. Set bits RAMS and RAM2 to RAM0 in RAMCR to 1,0, 0, 0, to overlap part of RAM onto the

area (EB0) for which realtime programming is required.

2. Realtime programming is performed using the overlapping RAM.

3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.

4. The data written in the overlapping RAM is written into the flash memory space (EB0).

Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks

regardless of the value of RAM2 to RAM0 (emulation protection). In this state, setting

the P or E bit in FLMCR1 will not cause a transition to program mode or erase mode.

When actually programming or erasing a flash memory area, the RAMS bit should be

cleared to 0.

2. A RAM area cannot be erased by execution of software in accordance with the erase

algorithm while flash memory emulation in RAM is being used.

3. Block area EB0 contains the vector table. When performing RAM emulation, the

vector table is needed in the overlap RAM.

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