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H8/3028F 数据表(PDF) 115 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 115 Page - Renesas Technology Corp |
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115 / 923 page  Rev. 2.00, 09/03, page 85 of 890 Interrupt Priority Register A (IPRA): IPRA is an 8-bit readable/writable register in which interrupt priority levels can be set. Bit Initial value Read/Write 7 IPRA7 0 R/W 6 IPRA6 0 R/W 5 IPRA5 0 R/W 4 IPRA4 0 R/W 3 IPRA3 0 R/W 0 IPRA0 0 R/W 2 IPRA2 0 R/W 1 IPRA1 0 R/W Priority level A7 Selects the priority level of IRQ interrupt requests Priority level A3 Selects the priority level of WDT, DRAM interface, and A/D converter interrupt requests Priority level A2 Selects the priority level of 16-bit timer channel 0 interrupt requests Priority level A1 Selects the priority level of 16-bit timer channel 1 interrupt requests Priority level A0 Selects the priority level of 16-bit timer channel 2 interrupt requests Selects the priority level of IRQ interrupt requests Priority level A6 Selects the priority level of IRQ and IRQ interrupt requests Priority level A5 Selects the priority level of IRQ and IRQ interrupt requests Priority level A4 0 1 23 45 IPRA is initialized to H'00 by a reset and in hardware standby mode. |
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