H8SLASH3028F datasheet(306/923 Pages) RENESAS

306 / 923 page

Rev. 2.00, 09/03, page 276 of 890

Modes 6 and 7 (Single-Chip Mode): Port 8 is a generic input/output port. A pin in port 8

becomes an output port if the corresponding P8DDR bit is set to 1, and an input port if this bit is

cleared to 0.

P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.

P8DDR is initialized to H'F0 in modes 1 to 4, and to H'E0 in modes 5 to 7, by a reset and in

hardware standby mode. In software standby mode P8DDR retains its previous setting. Therefore,

if a transition is made to software standby mode while port 8 is functioning as an input/output port

and a P8DDR bit is set to 1, the corresponding pin maintains its output state.

Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores output data

for port 8. When port 8 functions as an output port, the value of this register is output. When a bit

in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is returned. When

a bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin logic level is read.

Bits 7 to 5 are reserved. They are fixed at 1, and cannot be modified.

Bit

Initial value

Read/Write

—

R/W

Reserved bits

Port 8 data 4 to 0

These bits store data

for port 8 pins

P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it

retains its previous setting.

H8/3028F 数据表(PDF) 306 Page - Renesas Technology Corp