H8SLASH3028F datasheet(311/923 Pages) RENESAS

311 / 923 page

Rev. 2.00, 09/03, page 281 of 890

8.10.2

Table 8.16 summarizes the registers of port 9.

Table 8.16 Port 9 Registers

Address*

Name

Abbreviation

R/W

Initial Value

H'EE008

Port 9 data direction register

P9DDR

H'C0

H'FFFD8

Port 9 data register

P9DR

R/W

H'C0

Note: * Lower 20 bits of the address in advanced mode.

Port 9 Data Direction Register (P9DDR): P9DDR is an 8-bit write-only register that can select

input or output for each pin in port 9.

Bits 7 and 6 are reserved. They are fixed at 1, and cannot be modified.

Bit

Initial value

Read/Write

—

P9 DDR

Reserved bits

Port 9 data direction 5 to 0

These bits select input or

output for port 9 pins

When port 9 functions as an input/output port, a pin in port 9 becomes an output port if the

corresponding P9DDR bit is set to 1, and an input port if this bit is cleared to 0. For the method of

selecting the pin functions, see table 8.17.

P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read.

P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode

it retains its previous setting. Therefore, if a transition is made to software standby mode while

port 9 is functioning as an input/output port and a P9DDR bit is set to 1, the corresponding pin

maintains its output state.

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