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WM8904ECS/R 数据表(PDF) 49 Page - Wolfson Microelectronics plc |
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WM8904ECS/R 数据表(HTML) 49 Page - Wolfson Microelectronics plc |
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49 / 188 page  Pre-Production WM8904 w PP, Rev 3.3, September 2012 49 ANALOGUE-TO-DIGITAL CONVERTER (ADC) The WM8904 uses stereo 24-bit, 128x oversampled sigma-delta ADCs. The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise. An oversample rate of 64x can also be supported - see “Clocking and Sample Rates” for details. The ADC full scale input level is proportional to AVDD - see “Electrical Characteristics”. Any input signal greater than full scale may overload the ADC and cause distortion. The ADCs are enabled by the ADCL_ENA and ADCR_ENA register bits. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R18 (12h) Power Management (6) 1 ADCL_ENA 0 Left ADC Enable 0 = ADC disabled 1 = ADC enabled 0 ADCR_ENA 0 Right ADC Enable 0 = ADC disabled 1 = ADC enabled Table 9 ADC Enable Control ADC DIGITAL VOLUME CONTROL The output of the ADCs can be digitally amplified or attenuated over a range from -71.625dB to +17.625dB in 0.375dB steps. The volume of each channel can be controlled separately. The gain for a given eight-bit code is detailed in Table 11. The ADC_VU bit controls the loading of digital volume control data. When ADC_VU is set to 0, the ADCL_VOL or ADCR_VOL control data will be loaded into the respective control register, but will not actually change the digital gain setting. Both left and right gain settings are updated when a 1 is written to ADC_VU. This makes it possible to update the gain of both channels simultaneously. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R36 (24h) ADC Digital Volume Left 8 ADC_VU 0 ADC Volume Update Writing a 1 to this bit will cause left and right ADC volume to be updated simultaneously 7:0 ADCL_VOL [7:0] 1100_0000 (0dB) Left ADC Digital Volume 00h = Mute 01h = -71.625dB 02h = -71.250dB … (0.375dB steps) C0h = 0dB … (0.375dB steps) EFh to FFh = +17.625dB (See Table 11 for volume range) R37 (25h) ADC Digital Volume Right 8 ADC_VU 0 ADC Volume Update Writing a 1 to this bit will cause left and right ADC volume to be updated simultaneously 7:0 ADCR_VOL [7:0] 1100_0000 (0dB) Right ADC Digital Volume 00h = Mute 01h = -71.625dB 02h = -71.250dB … (0.375dB steps) C0h = 0dB … (0.375dB steps) EFh to FFh = +17.625dB (See Table 11 for volume range) Table 10 ADC Digital Volume Control |
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