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WM8904ECS/R 数据表(PDF) 82 Page - Wolfson Microelectronics plc |
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WM8904ECS/R 数据表(HTML) 82 Page - Wolfson Microelectronics plc |
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82 / 188 page  WM8904 Pre-Production w PP, Rev 3.3, September 2012 82 LOW POWER PLAYBACK MODE The analogue circuits of the WM8904 require a bias current. The default bias configuration is suitable for typical applications, and does not require any user adjustment. For lowest power consumption in headphone or line output playback mode, the WM8904 bias settings must be configured using the register sequence described in Table 48. Note that the low power playback bias settings are recommended for DAC / Playback modes only; they are not suitable for ADC / Record Path modes. REGISTER ADDRESS VALUE 04h 0011h 08h 0019h CCh 0030h 5Bh 0002h 63h 2425h 64h 2B23h A1h 0002h 65h 00C0h A1h 0000h Table 48 Low Power Playback Mode Enable Sequence The low power mode disable sequence is described in Table 49. Note that the low power playback bias settings are not suitable for ADC / Record Path modes; the low power configuration must be disabled for these modes. REGISTER ADDRESS VALUE 04h 0019h 08h 0001h CCh 0000h 5Bh 0000h 63h 1F25h 64h 2B19h A1h 0002h 65h 01C0h A1h 0000h Table 49 Low Power Playback Mode Disable Sequence |
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