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WM8904ECS/R 数据表(PDF) 75 Page - Wolfson Microelectronics plc |
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WM8904ECS/R 数据表(HTML) 75 Page - Wolfson Microelectronics plc |
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75 / 188 page  Pre-Production WM8904 w PP, Rev 3.3, September 2012 75 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R94 (5Eh) Analogue Lineout 0 7 LINEOUTL_RMV_ SHORT 0 Removes LINEOUTL short 0 = LINEOUTL short enabled 1 = LINEOUTL short removed For normal operation, this bit should be set as the final step of the LINEOUTL Enable sequence. 6 LINEOUTL_ENA_ OUTP 0 Enables LINEOUTL output stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the DC offset cancellation has been scheduled. 5 LINEOUTL_ENA_ DLY 0 Enables LINEOUTL intermediate stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the output signal path has been configured, and before DC offset cancellation is scheduled. This bit should be set with at least 20us delay after LINEOUTL_ENA. 4 LINEOUTL_ENA 0 Enables LINEOUTL input stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set as the first step of the LINEOUTL Enable sequence. 3 LINEOUTR_RMV _SHORT 0 Removes LINEOUTR short 0 = LINEOUTR short enabled 1 = LINEOUTR short removed For normal operation, this bit should be set as the final step of the LINEOUTR Enable sequence. 2 LINEOUTR_ENA_ OUTP 0 Enables LINEOUTR output stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the DC offset cancellation has been scheduled. 1 LINEOUTR_ENA_ DLY 0 Enables LINEOUTR intermediate stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set to 1 after the output signal path has been configured, and before DC offset cancellation is scheduled. This bit should be set with at least 20us delay after LINEOUTR_ENA. 0 LINEOUTR_ENA 0 Enables LINEOUTR input stage 0 = Disabled 1 = Enabled For normal operation, this bit should be set as the first step of the LINEOUTR Enable sequence. Table 43 Headphone / Line Output Pop Suppression Control |
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