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WM8904ECS/R 数据表(PDF) 9 Page - Wolfson Microelectronics plc |
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WM8904ECS/R 数据表(HTML) 9 Page - Wolfson Microelectronics plc |
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9 / 188 page  Pre-Production WM8904 w PP, Rev 3.3, September 2012 9 PIN DESCRIPTION NAME WLCSP 6×6 QFN-32 TYPE DESCRIPTION IN1L / DMICDAT1 B3 27 Analogue / Digital Input Left channel input 1 / Digital microphone data input 1 IN2L A2 26 Analogue Input Left channel input 2 IN3L C3 n/a Analogue Input Left channel input 3 IN1R / DMICDAT2 A1 25 Analogue / Digital Input Right channel input 1 / Digital microphone data input 2 IN2R B2 24 Analogue Input Right channel input 2 IN3R C2 n/a Analogue Input Right channel input 3 MICBIAS D1 20 Analogue Output Microphone bias MICVDD E1 19 Supply Microphone bias amp supply HPOUTL E3 13 Analogue Output Left headphone output (line or headphone output) HPOUTR E2 15 Analogue Output Right headphone output (line or headphone output) HPOUTFB F3 14 Analogue Input Headphone output ground loop noise rejection feedback LINEOUTL F2 16 Analogue Output Left line output 1 (line output) LINEOUTR F1 18 Analogue Output Right line output 1 (line output) LINEOUTFB D2 17 Analogue Input Line output ground loop noise rejection feedback CPVDD E6 7 Supply Charge pump power supply CPGND F6 9 Supply Charge pump ground CPCA E5 8 Analogue Output Charge pump flyback capacitor pin CPCB F5 10 Analogue Output Charge pump flyback capacitor pin CPVOUTP E4 11 Analogue Output Charge pump positive supply decoupling (powers HPOUTL/R, LINEOUTL/R) CPVOUTN F4 12 Analogue Output Charge pump negative supply decoupling (powers HPOUTL/R, LINEOUTL/R) AVDD B1 23 Supply Analogue power supply (powers analogue inputs, reference, ADC, DAC) AGND C1 22 Supply Analogue power return VMIDC D3 21 Midrail voltage decoupling capacitor DCVDD D5 6 Supply Digital core supply DBVDD C6 4 Supply Digital buffer supply (powers audio interface and control interface) DGND D6 5 Supply Digital ground (return path for DCVDD and DBVDD) MCLK A4 28 Digital Input Master clock for CODEC BCLK / GPIO4 C4 29 Digital Input / Output Audio interface bit clock / GPIO4 LRCLK A5 30 Digital Input / Output Audio interface left / right clock (common for ADC and DAC) DACDAT A6 32 Digital Input DAC digital audio data ADCDAT B5 31 Digital Output ADC digital audio data SCLK B6 2 Digital Input Control interface clock input SDA D4 3 Digital Input / Output Control interface data input / output GPIO1 / IRQ C5 1 Digital Input / Output GPIO1 / Interrupt GPIO2 B4 n/a Digital Input / Output GPIO2 GPIO3 A3 n/a Digital Input / Output GPIO3 GND_PADDLE n/a 33 Die Paddle Note: 1. It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB. |
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