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WM8940CGEFL/RV 数据表(PDF) 28 Page - Wolfson Microelectronics plc |
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WM8940CGEFL/RV 数据表(HTML) 28 Page - Wolfson Microelectronics plc |
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28 / 91 page ![]() WM8940 Production Data w PD, Rev 4.3, November 2011 28 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) The WM8940 has an automatic PGA gain control circuit, which can function as an input peak limiter or as an automatic level control (ALC). The Automatic Level Control (ALC) provides continuous adjustment of the input PGA in response to the amplitude of the input signal. A digital peak detector monitors the input signal amplitude and compares it to a register defined threshold level (ALCLVL). If the signal is below the threshold, the ALC will increase the gain of the PGA at a rate set by ALCDCY. If the signal is above the threshold, the ALC will reduce the gain of the PGA at a rate set by ALCATK. The ALC has two modes selected by the ALCMODE register: normal mode and peak limiter mode. The ALC/limiter function is enabled by setting the register bit R32[8] ALCSEL. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R32 (20h) ALC Control 1 2:0 ALCMIN [2:0] 000 (-12dB) Set minimum gain of PGA 000 = -12dB 001 = -6dB 010 = 0dB 011 = +6dB 100 = +12dB 101 = +18dB 110 = +24dB 111 = +30dB 5:3 ALCMAX [2:0] 111 (+35.25dB) Set Maximum Gain of PGA 111 = +35.25dB 110 = +29.25dB 101 = +23.25dB 100 = +17.25dB 011 = +11.25dB 010 = +5.25dB 001 = -0.75dB 000 = -6.75dB 8 ALCSEL 0 ALC function select (see Note) 0 = ALC disabled 1 = ALC Enabled |
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