AD6620SSLASHPCB datasheet(31/43 Pages) AD

31 / 43 page

AD6620

–31–

REV. 0

Read Pseudocode

int read_micro(ext_address);

main();

{

/* This code shows the reading of the NCO frequency register

using the read_micro function as defined above. The variable

address is the External Address A[2 . . 0].

Internal Address = 0x303

// holding registers for NCO byte wide access data

int d3, d2, d1, d0;

// NCO frequency word (32 bits wide)

// write AMR

write_micro(7, 0x03 );

// write LAR

write_micro(6, 0x03);

/* read D[7:0] from DR0, All data is moved from the Internal

Registers to the interface registers on this access */

d0 = read_micro(0) & 0xFF;

// read D[15:8] from DR1

d1 = read_micro(1) & 0xFF;

// read D[23:16] from DR2

d2 = read_micro(2) & 0xFF;

// read D[31:24] from DR3

d3 = read_micro(3) & 0xFF;

// DR4 is not needed because NCO_FREQ is only 32 bits

// Assemble 32-bit NCO_FREQ word from the 4-byte

components

NCO_FREQ = d0 + (d1 << 8) + (d2 << 16) + (d3 << 24);

} // end of main

Auto Increment Feature

To increase throughput, an auto increment feature is provided.

This feature is controlled by Bits 6 and 7 of the AMR. If these

bits are set to 00, the address remains the same after an internal

access. If set to 01, the address is incremented after a read ac-

cess has been performed. If set to 10, the address is incremented

after a write access is performed. If set to 11, the address is incre-

mented after each access, read or write. This allows the AD6620

to be initialized in a much shorter time since the access to the

LAR and AMR must occur only once to initialize or read-back

the entire device.

MICROPORT CONTROL

External reads and writes are accomplished in one of two modes

via the Microprocessor Port. The

CS, RD (DS), RDY

(

DTACK), WR (R/W) and MODE pins are used to control the

access. The specific function of these pins depends on whether

the access is MODE 0 or MODE 1. The Mode 1 signal names

are those listed on the pinout. The access mode is controlled by

the MODE input as described in the following sections.

Table IX. Microprocessor Control Signals

MODE 0

MODE 1

A[2:0] (Address Lines)

D[7:0] (Data Lines)

CS (Chip Select)

RD (Read Strobe)

DS (Data Strobe)

WR (Write Strobe)

R/W (Read/Write Select)

RDY (Ready Signal)

DTACK (Data Acknowledge)

MODE (Mode Select)

The Microport is synchronous with the master clock (CLK) of

the AD6620, but the interface isn’t required to be. If the speed

of the interface is significantly slower than CLK, synchronicity

should be no issue. If the interface is relatively fast compared to

CLK, the user may need to synchronize the Microport to CLK.

The timing diagrams show the relationship of the control signals

to clock and the user should use these as a guide to implement a

Microport interface.

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