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S12OSCV2D 数据表(PDF) 62 Page - Freescale Semiconductor, Inc |
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S12OSCV2D 数据表(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 126 page ![]() MC9S12DJ64 Device User Guide — V01.17 62 2.3.55 PS2 / RXD1 — Port S I/O Pin 2 PS2 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial Communication Interface 1 (SCI1). 2.3.56 PS1 / TXD0 — Port S I/O Pin 1 PS1 is a general purpose input or output pin. It can be configured as the transmit pin TXD of Serial Communication Interface 0 (SCI0). 2.3.57 PS0 / RXD0 — Port S I/O Pin 0 PS0 is a general purpose input or output pin. It can be configured as the receive pin RXD of Serial Communication Interface 0 (SCI0). 2.3.58 PT[7:0] / IOC[7:0] — Port T I/O Pins [7:0] PT7-PT0 are general purpose input or output pins. They can be configured as input capture or output compare pins IOC7-IOC0 of the Enhanced Capture Timer (ECT). 2.4 Power Supply Pins MC9S12DJ64 power and ground pins are described below. NOTE: All VSS pins must be connected together in the application. Table 2-2 MC9S12DJ64 Power and Ground Connection Summary Mnemonic Pin Number Nominal Voltage Description 112-pin QFP VDD1, 2 13, 65 2.5V Internal power and ground generated by internal regulator VSS1, 2 14, 66 0V VDDR 41 5.0V External power and ground, supply to pin drivers and internal voltage regulator. VSSR 40 0V VDDX 107 5.0V External power and ground, supply to pin drivers. VSSX 106 0V VDDA 83 5.0V Operating voltage and ground for the analog-to-digital converters and the reference for the internal voltage regulator, allows the supply voltage to the A/D to be bypassed independently. VSSA 86 0V VRL 85 0V Reference voltages for the analog-to-digital converter. VRH 84 5.0V |
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