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S12OSCV2D 数据表(PDF) 64 Page - Freescale Semiconductor, Inc |
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S12OSCV2D 数据表(HTML) 64 Page - Freescale Semiconductor, Inc |
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64 / 126 page ![]() MC9S12DJ64 Device User Guide — V01.17 64 2.4.5 VRH, VRL — ATD Reference Voltage Input Pins VRH and VRL are the reference voltage input pins for the analog to digital converter. 2.4.6 VDDPLL, VSSPLL — Power Supply Pins for PLL Provides operating voltage and ground for the Oscillator and the Phased-Locked Loop. This allows the supply voltage to the Oscillator and PLL to be bypassed independently.This 2.5V voltage is generated by the internal voltage regulator. NOTE: No load allowed except for bypass capacitors. 2.4.7 VREGEN — On Chip Voltage Regulator Enable Enables the internal 5V to 2.5V voltage regulator. If this pin is tied low, VDD1,2 and VDDPLL must be supplied externally. |
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