S12OSCV2D datasheet(20/126 Pages) FREESCALE

20 / 126 page

MC9S12DJ64 Device User Guide — V01.17

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4K byte RAM

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Two 8-channel Analog-to-Digital Converters

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10-bit resolution

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External conversion trigger capability

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1M bit per second, CAN 2.0 A, B software compatible module

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Five receive and three transmit buffers

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Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

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Four separate interrupt channels for Rx, Tx, error and wake-up

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Low-pass filter wake-up function

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Loop-back for self test operation

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Enhanced Capture Timer

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16-bit main counter with 7-bit prescaler

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8 programmable input capture or output compare channels

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Four 8-bit or two 16-bit pulse accumulators

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8 PWM channels

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Programmable period and duty cycle

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8-bit 8-channel or 16-bit 4-channel

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Separate control for each pulse width and duty cycle

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Center-aligned or left-aligned outputs

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Programmable clock select logic with a wide range of frequencies

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Fast emergency shutdown input

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Usable as interrupt inputs

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Serial interfaces

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Two asynchronous Serial Communications Interfaces (SCI)

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Synchronous Serial Peripheral Interface (SPI)

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Byte Data Link Controller (BDLC)

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SAE J1850 Class B Data Communications Network Interface Compatible and ISO Compatible

for Low-Speed (<125 Kbps) Serial Data Communications in Automotive Applications

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Inter-IC Bus (IIC)

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Compatible with I2C Bus standard

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Multi-master operation

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Software programmable for one of 256 different serial clock frequencies

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112-Pin LQFP or 80 QFP package

S12OSCV2D 数据表(PDF) 20 Page - Freescale Semiconductor, Inc

S12OSCV2D 数据表(HTML) 20 Page - Freescale Semiconductor, Inc

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