S12OSCV2D datasheet(68/126 Pages) FREESCALE

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MC9S12DJ64 Device User Guide — V01.17

4.3 Security

The device will make available a security feature preventing the unauthorized read and write of the

memory contents. This feature allows:

•

Protection of the contents of FLASH,

•

Protection of the contents of EEPROM,

•

Operation in single-chip mode,

•

Operation from external memory with internal FLASH and EEPROM disabled.

The user must be reminded that part of the security must lie with the user’s code. An extreme example

would be user’s code that dumps the contents of the internal program. This code would defeat the purpose

of security. At the same time the user may also wish to put a back door in the user’s program. An example

of this is the user downloads a key through the SCI which allows access to a programming routine that

updates parameters stored in EEPROM.

4.3.1 Securing the Microcontroller

Once the user has programmed the FLASH and EEPROM (if desired), the part can be secured by

programming the security bits located in the FLASH module. These non-volatile bits will keep the part

secured through resetting the part and through powering down the part.

The security byte resides in a portion of the Flash array.

Check the Flash Block User Guide for more details on the security configuration.

4.3.2 Operation of the Secured Microcontroller

4.3.2.1 Normal Single Chip Mode

This will be the most common usage of the secured part. Everything will appear the same as if the part was

not secured with the exception of BDM operation. The BDM operation will be blocked.

Pierce Oscillator/external clock selected

Table 4-3 Voltage Regulator VREGEN

VREGEN

Description

Internal Voltage Regulator enabled

Internal Voltage Regulator disabled, VDD1,2 and

VDDPLL must be supplied externally with 2.5V

Table 4-2 Clock Selection Based on PE7

PE7 = XCLKS

Description

S12OSCV2D 数据表(PDF) 68 Page - Freescale Semiconductor, Inc

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