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S12OSCV2D 数据表(PDF) 90 Page - Freescale Semiconductor, Inc |
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S12OSCV2D 数据表(HTML) 90 Page - Freescale Semiconductor, Inc |
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90 / 126 page  MC9S12DJ64 Device User Guide — V01.17 90 The total power dissipation can be calculated from: Two cases with internal voltage regulator enabled and disabled must be considered: 1. Internal Voltage Regulator disabled PIO is the sum of all output currents on I/O ports associated with VDDX and VDDR. For RDSON is valid: respectively 2. Internal voltage regulator enabled IDDR is the current shown in Table A-7 and not the overall current flowing into VDDR, which additionally contains the current flowing into the external loads with output high. PIO is the sum of all output currents on I/O ports associated with VDDX and VDDR. T A Ambient Temperature, [ °C ] = P D Total Chip Power Dissipation, [W] = Θ JA Package Thermal Resistance, [ °C/W] = P D P INT P IO + = P INT Chip Internal Power Dissipation, [W] = P INT I DD V DD ⋅ I DDPLL V DDPLL ⋅ I DDA +V DDA ⋅ + = P IO R DSON i ∑ I IO i 2 ⋅ = R DSON V OL I OL ------------ for outputs driven low ; = R DSON V DD5 V OH – I OH ------------------------------------ for outputs driven high ; = P INT I DDR V DDR ⋅ I DDA V DDA ⋅ + = P IO R DSON i ∑ I IO i 2 ⋅ = |
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