数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

S12OSCV2D 数据表(PDF) 19 Page - Freescale Semiconductor, Inc

部件名 S12OSCV2D
功能描述  MC9S12DJ64 Device User GUide V01.17
PDF  126 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

S12OSCV2D 数据表(HTML) 19 Page - Freescale Semiconductor, Inc

Back Button S12OSCV2D Datasheet HTML 15Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 16Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 17Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 18Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 19Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 20Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 21Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 22Page - Freescale Semiconductor, Inc S12OSCV2D Datasheet HTML 23Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 126 page
background image
MC9S12DJ64 Device User Guide — V01.17
19
Section 1 Introduction
1.1 Overview
The MC9S12DJ64 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 64K bytes of Flash EEPROM, 4K
bytes of RAM, 1K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), one
serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit
analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link
Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital
I/O lines with interrupt and wakeup capability, a CAN 2.0 A, B software compatible modules
(MSCAN12), and an Inter-IC Bus. The MC9S12DJ64 has full 16-bit data paths throughout. However, the
external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower
cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to
suit operational requirements.
1.2 Features
HCS12 Core
16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
MEBI (Multiplexed External Bus Interface)
MMC (Module Mapping Control)
INT (Interrupt control)
BKP (Breakpoints)
BDM (Background Debug Mode)
CRG (low current Colpitts or Pierce oscillator, PLL, reset, clocks, COP watchdog, real time
interrupt, clock monitor)
8-bit and 4-bit ports with interrupt functionality
Digital filtering
Programmable rising or falling edge trigger
Memory
64K Flash EEPROM
1K byte EEPROM



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com