S12OSCV2D datasheet(72/126 Pages) FREESCALE

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MC9S12DJ64 Device User Guide — V01.17

5.3 Effects of Reset

When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the

respective module Block User Guides for register reset states.

5.3.1 I/O pins

Refer to the HCS12 Multiplexed External Bus Interface (MEBI) Block Guide for mode dependent pin

configuration of port A, B, E and K out of reset.

Refer to the PIM Block User Guide for reset configurations of all peripheral module ports.

$FFCA, $FFCB

Modulus Down Counter underﬂow

I-Bit

MCCTL (MCZI)

$CA

$FFC8, $FFC9

Pulse Accumulator B Overﬂow

I-Bit

PBCTL (PBOVI)

$C8

$FFC6, $FFC7

CRG PLL lock

I-Bit

CRGINT (LOCKIE)

$C6

$FFC4, $FFC5

CRG Self Clock Mode

I-Bit

CRGINT (SCMIE)

$C4

$FFC2, $FFC3

BDLC

I-Bit

DLCBCR1 (IE)

$C2

$FFC0, $FFC1

IIC Bus

I-Bit

IBCR (IBIE)

$C0

$FFBE, $FFBF

Reserved

I-Bit

Reserved

$BE

$FFBC, $FFBD

I-Bit

$BC

$FFBA, $FFBB

EEPROM

I-Bit

ECNFG (CCIE, CBEIE)

$BA

$FFB8, $FFB9

FLASH

I-Bit

FCNFG (CCIE, CBEIE)

$B8

$FFB6, $FFB7

CAN0 wake-up

I-Bit

CANRIER (WUPIE)

$B6

$FFB4, $FFB5

CAN0 errors

I-Bit

CANRIER (CSCIE, OVRIE)

$B4

$FFB2, $FFB3

CAN0 receive

I-Bit

CANRIER (RXFIE)

$B2

$FFB0, $FFB1

CAN0 transmit

I-Bit

CANTIER (TXEIE2-TXEIE0)

$B0

$FFAE, $FFAF

Reserved

I-Bit

Reserved

$AE

$FFAC, $FFAD

I-Bit

$AC

$FFAA, $FFAB

I-Bit

$AA

$FFA8, $FFA9

I-Bit

$A8

$FFA6, $FFA7

I-Bit

$A6

$FFA4, $FFA5

I-Bit

$A4

$FFA2, $FFA3

I-Bit

$A2

$FFA0, $FFA1

I-Bit

$A0

$FF9E, $FF9F

I-Bit

$9E

$FF9C, $FF9D

I-Bit

$9C

$FF9A, $FF9B

I-Bit

$9A

$FF98, $FF99

I-Bit

$98

$FF96, $FF97

I-Bit

$96

$FF94, $FF95

I-Bit

$94

$FF92, $FF93

I-Bit

$92

$FF90, $FF91

I-Bit

$90

$FF8E, $FF8F

Port P

I-Bit

PIEP (PIEP7-0)

$8E

$FF8C, $FF8D

PWM Emergency Shutdown

I-Bit

PWMSDN (PWMIE)

$8C

$FF80 to

$FF8B

Reserved

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