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STM8S103F2 数据表(PDF) 59 Page - STMicroelectronics |
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STM8S103F2 数据表(HTML) 59 Page - STMicroelectronics |
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59 / 117 page ![]() Unit Max at 125 °C (1) Max at 85 °C (1) Typ Conditions Parameter Symbol Clock source Flash mode (3) Main voltage regulator (MVR) (2) 110 85 66 LSI RC osc. (128 kHz) Operating mode Off Supply current in active halt mode IDD(AH) 40 20 10 LSI RC osc. (128 kHz) Power-down mode Supply current in active halt mode IDD(AH) (1) Data based on characterization results, not tested in production (2) Configured by the REGAH bit in the CLK_ICKR register. (3) Configured by the AHALT bit in the FLASH_CR1 register. Table 26: Total current consumption in active halt mode at VDD = 3.3 V Unit Max at 125 °C (1) Max at 85 °C (1) Typ Conditions Parameter Symbol Clock source Flash mode (3) Main voltage regulator (MVR) (2) μA - - 550 HSE crystal osc. (16 MHz) Operating mode On Supply current in active halt mode IDD(AH) μA 290 260 200 LSI RC osc. (128 kHz) Operating mode On Supply current in active halt mode IDD(AH) - - 970 HSE crystal osc. (16 MHz) Power-down mode IDD(AH) 230 200 150 LSI RC osc. (128 kHz) Supply current in active halt mode IDD(AH) 105 80 66 LSI RC osc. (128 kHz) Operating mode Off IDD(AH) 35 18 10 Power-down mode IDD(AH) (1) Data based on characterization results, not tested in production (2) Configured by the REGAH bit in the CLK_ICKR register. (3) Configured by the AHALT bit in the FLASH_CR1 register. 59/117 DocID15441 Rev 9 Electrical characteristics STM8S103K3 STM8S103F3 STM8S103F2 |
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