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STM8S103F2 数据表(PDF) 38 Page - STMicroelectronics |
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STM8S103F2 数据表(HTML) 38 Page - STMicroelectronics |
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38 / 117 page  Reset status Register name Register label Block Address 0x00 TIM2 capture/compare register 1 low TIM2_CCR1L 0x00 5312 0x00 TIM2 capture/compare reg. 2 high TIM2_CCR2H 0x00 5313 0x00 TIM2 capture/compare register 2 low TIM2_CCR2L 0x00 5314 0x00 TIM2 capture/compare register 3 high TIM2_CCR3H 0x00 5315 0x00 TIM2 capture/compare register 3 low TIM2_CCR3L 0x00 5316 Reserved area (43 bytes) 0x00 5317 to 0x00 533F 0x00 TIM4 control register 1 TIM4_CR1 TIM4 0x00 5340 Reserved 0x00 5341 Reserved 0x00 5342 0x00 TIM4 interrupt enable register TIM4_IER 0x00 5343 0x00 TIM4 status register TIM4_SR 0x00 5344 0x00 TIM4 event generation register TIM4_EGR 0x00 5345 0x00 TIM4 counter TIM4_CNTR 0x00 5346 0x00 TIM4 prescaler register TIM4_PSCR 0x00 5347 0xFF TIM4 auto-reload register TIM4_ARR 0x00 5348 Reserved area (153 bytes) 0x00 5349 to 0x00 53DF 0x00 ADC data buffer registers ADC _DBxR ADC1 0x00 53E0 to 0x00 53F3 Reserved area (12 bytes) 0x00 53F4 to 0x00 53FF DocID15441 Rev 9 38/117 STM8S103K3 STM8S103F3 STM8S103F2 Memory and register map |
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