 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
STM8S103F2 数据表(PDF) 32 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8S103F2 数据表(HTML) 32 Page - STMicroelectronics |
|
|
32 / 117 page  Reset status Register name Register label Block Address 0x00 Configurable clock control register CLK_CCOR 0x00 50C9 0xFF Peripheral clock gating register 2 CLK_PCKENR2 0x00 50CA 0x00 HSI clock calibration trimming register CLK_HSITRIMR 0x00 50CC 0bXXXX XXX0 SWIM clock control register CLK_SWIMCCR 0x00 50CD ReservLK ed area (3 bytes) 0x00 50CE to 0x00 50D0 0x7F WWDG control register WWDG_CR WWDG 0x00 50D1 0x7F WWDR window register WWDG_WR 0x00 50D2 Reserved area (13 bytes) 0x00 50D3 to 00 50DF 0xXX (2) IWDG key register IWDG_KR IWDG 0x00 50E0 0x00 IWDG prescaler register IWDG_PR 0x00 50E1 0xFF IWDG reload register IWDG_RLR 0x00 50E2 Reserved area (13 bytes) 0x00 50E3 to 0x00 50EF 0x00 AWU control/status register 1 AWU_CSR1 AWU 0x00 50F0 0x3F AWU asynchronous prescaler buffer register AWU_APR 0x00 50F1 0x00 AWU timebase selection register AWU_TBR 0x00 50F2 0x1F BEEP control/status register BEEP_CSR BEEP 0x00 50F3 DocID15441 Rev 9 32/117 STM8S103K3 STM8S103F3 STM8S103F2 Memory and register map |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
